Tackling the Little Box Challenge: New circuit architectures to achieve a 216 W in 3 power density 2 kW inverter Slides

Tackling the Little Box Challenge: New circuit architectures to achieve a 216 W in 3 power density 2 kW inverter Slides
Posted: 25 May 2016
Authors:
Robert Pilawa-Podgurski
Primary Committee:
PELS
Pages: 67

This talk will describe new circuit architectures and control methods that our research group developed for the Google and IEEE One Million Dollar Little Box Challenge an international power electronics design competition with the goal to demonstrate the highest power density 2 kW 400 VDC to 240 VAC inverter. I will provide background information on some of the key technical challenges associated with twice line frequency buffering waveform quality and EMI compliance. Following this, I will provide an overview of our recently developed series stacked buffer converter to provide ultra efficient active filtering along with a 7 level GaN based flying capacitor multilevel inverter that enables extreme miniaturization of passive components. Experimental measurements from an FCC Class B EMI compliant 97.6 percent efficient power inverter with a power density of 216 w in 3 will be presented along with a discussion on lessons learned from this design competition.

Pricing:
PELS Members: Not Available
IEEE Members: Not Available
Non-members: Not Available
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