Advancing Layout Tools to Support High Performance-High Frequency Power Electronic Design-Video

Posted:
19 Nov 2020
Authors:
Eckart Hoene
Primary Committee:
PELS
Page/Slide Count:
Time: 1:27:02
Abstract: Routing power electronic circuits for high speed switching becomes very tricky, as parasitic effects gain relevance and influence system performance significantly. For example some parts of the circuit have to be routed with low inductance, others for low coupling capacitance, proximity effects dominate losses and so on. Although there are tools to calculate these kind of effects it is not straight forward to use them during the design process. The transfer of the layout data to the calculation tool works seldom without rework and the tools need special knowledge to get the right results. Layout tool integrated evaluation features may offer a way out of this obstruction.

In the webinar the performance relevant parasitics are gathered and ways to handle them in layout tools discussed. Solutions for ohmic losses in arbitrarily formed tracks and inductance are demonstrated
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